1. Field of the Invention
This invention relates to semiconductor device packages and, more particularly, to removing a heat spreader from above an integrated circuit chip encapsulated within a device package to expose the chip and the inside of the package for reliability and failure analysis testing.
2. Description of the Related Art
During integrated circuit manufacturing, a large number of identical integrated circuit devices (e.g., a microprocessor) are typically produced upon a unitary silicon substrate in an array of rectangular elements called "dice". Signals lines which are formed upon the silicon substrate for each individual device are terminated at flat metal contact regions called input/output (I/O) pads. The signal lines are to be connected to external devices. Following manufacture, the substrate is sliced into individual dice or chips, and each chip is secured within a protective semiconductor device package. The role of the package is to provide mechanical support, electrical connection, protection, and heat removal for the die. Each I/O pad of the chip is connected to one or more terminals of the device package. The terminals of a device package are typically arranged about the periphery of the package. Fine metal wires may be used to connect the I/O pads of the chip to the terminals of the device package. Some types of device packages have terminals called "pins" for insertion into holes in a printed circuit board (PCB). Other types of device packages have terminals called "leads" for attachment to flat metal contact regions on an exposed surface of a PCB.
The controlled collapse chip connection ("C4") is a well known method of attaching an integrated circuit chip directly to a PCB, and is commonly referred to as the "flip chip" method. In preparation for C4 attachment, the I/O pads of the chip are arranged in a two-dimensional array upon an underside of the chip, and a corresponding set of bonding pads are formed upon an upper surface of the PCB. A solder ball (or bump) is formed upon each of the I/O pads of the chip. During C4 attachment of the chip to the PCB, the solder balls are placed in physical contact with the bonding pads of the PCB. The solder balls are then heated long enough for the solder to flow. When the solder cools, the I/O pads of the chip are electrically and mechanically coupled to the bonding pads of the PCB. After the chip is attached to the PCB, the region between the chip and the PCB is filled with an "underfill" material which encapsulates the C4 connections and provides other mechanical advantages.
A ball grid array ("BGA") device package includes a chip mounted upon a larger substrate made of, for example, fiberglass-epoxy printed circuit board material or a ceramic material (e.g., aluminum oxide, alumina, or aluminum nitride). FIG. 1 depicts a an exemplary BGA device package 10. The substrate 14 includes two sets of bonding pads: a first bonding pad set 16 adjacent to the chip 12 and a second bonding pad set 18 arranged in a two-dimensional array across the underside surface of the device package 10. The I/O pads 20 of the chip 12 are typically connected to corresponding members of the first bonding pad set 16 via solder bumps 22 using the C4 technique described above. One or more layers of signal lines (i.e., interconnects) of the substrate 14 connect respective members of the first and second sets of bonding pads. Members of the second bonding pad set 18 are coated with solder, forming solder ball terminals 24. A stiffener 26 may be attached to the perimeter of the upper surface of substrate 14 by a first adhesive layer 28. Stiffener 16 helps maintain the substantially planar shape of substrate 14 during and after C4 heating of solder bumps 22.
A heat spreader 30 is also attached to the upper surface of substrate 14 by a second conductive adhesive layer 32, and a thermally conductive adhesive layer 34 is interposed between chip 12 and heat spreader 30. Heat spreader 30 may be composed of copper which exhibits high thermal conductivity. During operation, semiconductor devices (e.g., integrated circuit chips) dissipate electrical power, transforming electrical energy into heat energy. Heat spreader 30 permits the heat energy produced by chip 12 to be removed to the ambient environment at a rate which ensures operational and reliability requirements are met. Otherwise, the temperature of chip 12 might exceed a specified operating temperature, resulting in irreversible damage to the chip.
After a chip is packaged, it may undergo testing to identify any device damage that may have occurred during the assembly of the package. Moreover, certain elements of device performance, such as speed, can only be measured in the completed package. For some devices, final testing may be preceded by a "bum-in" in which the device is operated for a period of time under stress. Such devices are then tested to determine if performance of the devices is still acceptable. Various types of failure mechanisms can occur. For example, the chip passivation layer which is usually made of brittle glass films may crack. Metallization on the chip may deform as a result of shear stresses between the package elements and the chip. Voids and cracks may also occur in the package itself. Adhesive layers between the chip and the package may undergo delamination. Various types of tests are used to perform failure analysis of a chip and its package. For example, infrared absorption spectroscopy and emission spectroscopy may be used to analyze the underside surface of the chip for fault localization. Acoustic microscopy may be used to determine if any delaminations or voids exist in e.g., adhesion layers of the package. Whatever testing mechanism is used, it is oftentimes necessary to characterize failures post-packaging.
Before performing failure analysis of a chip and its package, access to the chip and the inside of the package must be obtained. Conventional techniques for gaining access to a chip packaged according to FIG. 1 involve removal of the heat spreader 30 from the package 10. Unfortunately, current methods for heat spreader removal are problematic. As shown in FIG. 1, one method involves inserting a sharp, thin object, e.g., a razor blade underneath heat spreader 30 at e.g., point 29 such that the razor blade can function as a lever. The heat spreader 30 is then mechanically pried from chip 12 and stiffener 26 by applying an upward force to one end of the razor blade, thereby causing the other end of the razor blade to apply a downward force on the underlying package and chip. Stress (compressive and shear) caused by the physical lever action may disrupt the chip relative to the package and/or force the package and/or chip into a nonplanar ("warped") state.
FIG. 2 depicts another technique which is often used to remove heat spreader 30 from package 10. The entire package 10 may be placed in a container 36 which is filled with a ferric chloride solution. The ferric chloride solution is maintained at a temperature which permits etching of the heat spreader, the heat spreader being composed of nickel plated copper. Unfortunately, the ferric chloride solution can also etch the stiffener 26 and the solder ball terminals 24 which are composed of tin and lead. Absence of solder ball terminals 24 makes electrical testing of the chip impossible since the I/O pads of the chip (i.e., the chip circuits) are electrically linked to the solder ball terminals 24. Further, this process is time consuming. Etching of nickel is relatively slow, and the etched materials must be carefully cleaned from the chip and package so as not to skew the failure analysis test.
Yet another method used to remove heat spreader 30 from package 10 is illustrated in FIG. 3. A shearing tool 40 is positioned such that a cavity at the base of the tool surrounds the top and sides of heat spreader 30. Heat is applied to heat spreader 30 while a handle attached to the top of shearing tool 40 is rotated in a clockwise or counterclockwise direction about axis 41. As a result, adhesive layers can no longer hold heat spreader 30 against stiffener 26 and chip 12, and the heat spreader 30 is sheared from package 10. The shear stress between heat spreader 30 and stiffener 26/chip 12 that occurs during removal of the heat spreader may lead to physical damage, such as delaminations in the package layers or cracks in the chip. Both mechanical heat spreader removal techniques which are shown in FIGS. 1 and 3 can lead to inconclusive failure analysis results. It may be impossible to determine whether a device or package was damaged during fabrication and packaging or during heat spreader removal.
It would therefore be desirable to devise a technique for providing access to the chip and the inside of the package without damaging the chip and without removing necessary components required for testing of the chip and package. A technique is needed which removes the heat spreader from above the chip to expose the chip without warping, cracking, or delaminating layers of the chip and its package and/or various package components. It would also be beneficial if removal of the solder ball terminals is prevented so that electric testing of the chip may be performed. A technique having these qualities would allow one to pinpoint failure mechanisms that occur during assembly of the chip and the package using failure analysis results.